Design Flow for a Fault-Tolerant Reconfigurable Multi-FPGA Architecture for Space Applications

Sensor technology continues to improve at the price of increased data rates, which require being processed. In the space domain, the available bandwidth for effectively transferring the data to the base station is limited, such that there is a need for a high-performance data processing unit on board of the spacecraft. This work targets the development of a scalable high-performance payload data processing system based on dynamically reconfigurable FPGAs. The system, which is called Dynamically Reconfigurable Processing Module (DRPM), enables a multitude of high performance data processing applications to be supported by the same hardware in space. While reconfigurable hardware offers higher performances than traditional DSP-based solutions, it also supports the same flexibility to modify the functionality at run-time. Dynamically Reconfigurable Processing Module (DRPM) The DRPM is a multi-FPGA architecture, which is designed especially for space applications. The FPGAs (Xilinx Virtex-4 family) are used to implement high performance data processing cores for a wide range of applications. In addition, the DRPM supports in-flight reconfiguration during a mission where required, whilst being fault-tolerant to space environment effects typically caused by high energy particles. Figure 1 shows a block diagram of the DRPM. The DRPM can be divided into interface components, control components, and data processing components. The payload data processing is performed on the FPGAs. Each FPGA is connected to a local memory bank, which is used for storing application data. Most of the FPGA resources are used for reconfigurable modules, which perform the payload data processing. Besides the reconfigurable modules each FPGA implements a memory controller for the local memory and a dynamic processing control unit to manage addresses and resources of the reconfigurable modules. The DRPM supports a variety of interfaces (CAN, SpaceWire, MIL-STD1553, etc.) to establish connection to avionics and source data instruments. The system controller is based on a Leon2-FT processor and offers services to the ground station to control all functions executed on the DRPM. The reconfiguration controller performs the reconfiguration processes of the FPGAs. Reconfiguration is used to M. Koester, J. Hagemeyer, F. Margaglia and M. Porrmann are with Heinz Nixdorf Institute, University of Paderborn, Paderborn, Germany. F. Dittmann and M. Ditze are with TWT GmbH Science & Innovation, Neuhausen, Germany. L. Sterpone is with Politecnico di Torino, Torino, Italy. J. Harris is with Swiss Space Technology, Champéry, Switzerland. J. Ilstad is with ESTEC, Noordwijk, The Netherlands. Control Components Data Processing Interfaces